
2011 Microchip Technology Inc.
DS70118J-page 5
dsPIC30F2010
Pin Diagrams
MCLR
PWM1L/RE0
PWM1H/RE1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VSS
VDD
EMUD3/AN0/VREF+/CN2/RB0
EMUC3/AN1/VREF-/CN3/RB1
AVDD
AVSS
AN2/SS1/CN4/RB2
EMUD2/OC2/IC2/INT2/RD1
EMUC2/OC1/IC1/INT1/RD0
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
EMUD1/SOSCI/T2CK/U1ATX/CN1//RC13
VSS
OSC2/CLKO/RC15
OSC1/CLKI
VDD
FLTA/INT0/SCK1/OCFA/RE8
PGC/EMUC/U1RX/SDI1/SDA/RF2
PGD/EMUD/U1TX/SDO1/SCL/RF3
AN5/QEB/IC8/CN7/RB5
AN4/QEA/IC7/CN6/RB4
AN3/INDX/CN5/RB3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
28-Pin SDIP and SOIC
d
s
P
IC
3
0
F
20
10
28-Pin QFN-S(1)
dsPIC30F2010
2
3
6
1
18
19
20
21
15
7
16
17
EMUD1/SOSCI/T2CK/U1A
T
X/CN1/RC1
3
5
4
AV
DD
AV
SS
P
W
M1L/
RE0
P
W
M1H/RE
1
PWM2L/RE2
PWM2H/RE3
PWM3L/RE4
PWM3H/RE5
VDD
VSS
PGC/EMUC/U1RX/SDI1/SDA/RF2
P
G
D/EMUD/U1TX
/S
D
O
1/SCL/RF
3
FLTA
/I
NT0/
SCK1
/O
C
F
A
/RE8
EM
U
C
2/
OC
1/
IC1
/I
N
T1
/RD0
MCL
R
EMUD3/AN0/VREF+/CN2/R
B
0
EMUC3/AN1/VREF-
/CN3/RB
1
AN2/SS1/CN4/RB2
AN3/INDX/CN5 RB3
AN4/QEA/IC7/CN6/RB4
AN5/QEB/IC8/CN7/RB5
VSS
OSC1/CLKI
OSC2/CLKO/RC15
E
M
UC
1
/S
O
SCO/T1CK
/U1A
R
X
/CN0/RC14
V
DD
EMUD2/OC2/IC2/INT
2
/RD1
10
11
12
13
14
8
9
22
23
24
25
26
27
28
Note
1:
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.